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INTEGRATED CIRCUITS
74ABT16646 74ABTH16646 16-bit bus transceiver/register (3-State)
Product specification Supersedes data of 1995 Aug 17 IC23 Data Handbook 1998 Feb 27
Philips Semiconductors
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
FEATURES
* Independent registers for A and B buses * Multiple VCC and GND pins minimize switching noise * Live insertion/extraction permitted * Power-up 3-State * Power-up reset * Multiplexed real-time and stored data * Outputs sink 64mA and source 32mA * Latch-up protection exceeds 500mA per JEDEC Std 17 * 74ABTH16646 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
DESCRIPTION
The 74ABT16646 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT16646 16-bit transceiver/register consists of two sets of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (nOE) and Direction (nDIR) pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. The select (nSAB, nSBA) pins determine whether data is stored or transferred through the device in real-time. The nDIR determines which bus will receive data when the nOE is active Low. In the isolation mode (nOE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time. Two options are available, 74ABT16646 which does not have the bus-hold feature and 74ABTH16646 which incorporates the bus-hold feature.
* ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN CI/O ICC CCZ PARAMETER Propagation delay nAx to nBx Input capacitance I/O capacitance Quiescent supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC VO = 0V or VCC; 3-State Outputs disabled; VCC =5.5V Outputs low; VCC =5.5V TYPICAL 3.3 2.7 3 7 550 9 UNIT ns pF pF A mA
ORDERING INFORMATION
PACKAGES 56-Pin Plastic SSOP Type III 56-Pin Plastic TSSOP Type II 56-Pin Plastic SSOP Type III 56-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74ABT16646 DL 74ABT16646 DGG 74ABTH16646 DL 74ABTH16646 DGG NORTH AMERICA BT16646 DL BT16646 DGG BH16646 DL BH16646 DGG DWG NUMBER SOT371-1 SOT364-1 SOT371-1 SOT364-1
PIN DESCRIPTION
PIN NUMBER 2, 55, 27, 30 3, 54, 26, 31 1, 28 5, 6, 8, 9, 10, 12, 13, 14 15, 16, 17, 19, 20, 21, 23, 24 52, 51, 49, 48, 47, 45, 44, 43 42, 41, 40, 38, 37, 36, 34, 33 56, 29 4, 11, 18, 25, 32, 39, 46, 53 7, 22, 35, 50 1998 Feb 27 SYMBOL 1CPAB, 1CPBA, 2CPAB, 2CPBA 1SAB, 1SBA, 2SAB, 2SBA 1DIR, 2DIR 1A0 - 1A7, 2A0 - 2A7 1B0 - 1B7, 2B0 - 2B7 1OE, 2OE GND VCC 2 NAME AND FUNCTION Clock input A to B / Clock input B to A Select input A to B / Select input B to A Direction control inputs Data inputs/outputs (A side) Data inputs/outputs (B side) Output enable inputs Ground (0V) Positive supply voltage 853-1782 19026
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
PIN CONFIGURATION
1DIR 1CPAB 1SAB GND 1A0 1A1 VCC 1A2 1A3 1A4 GND 1A5 1A6 1A7 2A0 2A1 2A2 GND 2A3 2A4 2A5 VCC 2A6 2A7 GND 2SAB 2CPAB 2DIR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE 1CPBA 1SBA GND 1B0 1B1 VCC 1B2 1B3 1B4 GND 1B5 1B6 1B7 2B0 2B1 2B2 GND 2B3 2B4 2B5 VCC 2B6 2B7 GND 2SBA 2CPBA 20E
SH00026
FUNCTION TABLE
INPUTS nOE X X H H L L L L H L X * = = = = nDIR X X X X L L nCPAB X H or L X X nCPBA X H or L X H or L nSAB X X X X X X nSBA X X X X L H nAx Input Unspecified output* Input Output DATA I/O nBx Unspecified output* Input Input Input OPERATING MODE
Store A, B unspecified Store B, A unspecified Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus
H X X L X Real time A data to B bus Input Output H H or L X H X Stored A data to B bus High voltage level Low voltage level Don't care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the nOE input. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
1998 Feb 27
3
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
LOGIC SYMBOL (IEEE/IEC)
1OE 56 G3 3 EN1 [BA] 3 EN2 [AB] 1CPBA 55 1SBA 54 1CPAB 2 1SAB 3 2OE 29 C4 G5 C6 G7 G10 10 EN8 [BA] 10 EN9 [AB] 2CPBA 30 2SBA 31 2CPAB 27 2SAB 26 C11 G12 C13 G14
LOGIC SYMBOL
1DIR 1
5
6
8
9
10
12
13
14
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 2 3 1 55 54 56 1CPAB 1SAB 1DIR 1CPBA 1SBA 1OE 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
2DIR 28
52 51 15 16
49 17
48 19
47 20
45 44 21 23
43 24
1A0
5
w1 1 6D 1 7 7
5 51 w1
4D
52 1B0 27 26
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2CPAB 2SAB 2DIR 2CPBA 2SBA 2OE 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
2 51 1B1 49 1B2 48 1B3 47 1B4 45 1B5 44 1B6 43 1B7
28 30 31 29
1A1 1A2 1A3
6 8 9
1A4 10 1A5 12 1A6 13 1A7 14 2A0 15 8 w1 12 12 14 14 11D 1 w1 9
42 41
40
38
37
36 34
33
42 2B0
SH00027
13D 1 2A1 16 2A2 17 2A3 19 2A4 20 2A5 21 2A6 23 2A7 24
41 2B1 40 2B2 38 2B3 37 2B4 36 2B5 34 2B6 33 2B7
SH00025
1998 Feb 27
4
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ABT16646. REAL TIME BUS TRANSFER BUS B TO BUS A REAL TIME BUS TRANSFER BUS A TO BUS B STORAGE FROM A, B, OR A AND B
A
B
A
B
A
B
}
nOE L nDIR nCPAB nCPBA nSAB nSBA L X X X L nOE L
nDIR nCPAB nCPBA nSAB nSBA H X X L X
TRANSFER STORED DATA TO A OR B
}
nOE L L H L X
nDIR nCPAB nCPBA nSAB nSBA H X X X X X X X X
}
A
B
}
nOE L L nDIR nCPAB nCPBA nSAB nSBA L X H|L X H H H|L X H X
SH00028
1998 Feb 27
5
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
LOGIC DIAGRAM
nOE
nDIR nCPBA nSBA nCPAB nSAB
1 of 16 Channels
1D C1 Q
nA0 1D C1 Q
nB0
nA1 nA2 nA3 nA4 nA5 nA6 nA7 DETAIL A X 7
nB1 nB2 nB3 nB4 nB5 nB6 nB7
SH00029
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 DC output current out ut output in High state Storage temperature range -64 -65 to 150 mA C VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING -0.5 to +7.0 -18 -1.2 to +7.0 -50 -0.5 to +5.5 128 UNIT V mA V mA V mA
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1998 Feb 27 6
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 -40 PARAMETER MIN 4.5 0 2.0 0.8 -32 64 10 +85 LIMITS MAX 5.5 VCC V V V V mA mA ns/V C UNIT
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C MIN VIK VOH VOL VRST II Input clamp voltage High-level output voltage Low-level output voltage Power-up output voltage3 Input leakage g current Bus Hold current A or B Ports5 74ABTH16646 Power-off leakage current Power-up/down 3-State output current4 3-State output High current 3-State output Low current Output High leakage current Output current1 VCC = 4.5V; IIK = -18mA VCC = 4.5V; IOH = -3mA; VI = VIL or VIH VCC = 5.0V; IOH = -3mA; VI = VIL or VIH VCC = 4.5V; IOH = -32mA; VI = VIL or VIH VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 5.5V; IO = 1mA; VI = GND or VCC VCC = 5 5V; VI = GND or 5 5V 5.5V 5.5V VCC = 4.5V; VI = 0.8V VCC = 4.5V; VI = 2.0V VCC = 5.5V; VI = 0 to 5.5V IOFF IPU/PD IIH + IOZH IIL + IOZL ICEX IO ICCH ICCL ICCZ ICC Additional supply current per input pin2 74ABT16646 Additional supply current per input pin2 74ABTH16646 Quiescent supply current VCC = 0.0V; VO = 4.5V; VI = 0.0V or 5.5V VCC = 2.1V; VO = 0.0V or VCC; VI = GND or VCC; OE/OE = X VCC = 5.5V; VO = 5.5V; VI = VIL or VIH VCC = 5.5V; VO = 0.0V; VI = VIL or VIH VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; Outputs 3-State; VI = GND or VCC VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND -50 Control pins 35 -75 800 2.0 1.0 1.0 -1.0 5.0 -80 0.55 9 0.55 5.0 100 50 10 -10 50 -180 2 19 2 50 -50 100 50 10 -10 50 -180 2 19 2 50 A A A A A mA mA mA mA A 2.5 3.0 2.0 TYP -0.9 2.9 3.4 2.4 0.35 0.13 0 01 0.01 0.55 0.55 1 0 1.0 35 -75 A MAX -1.2 2.5 3.0 2.0 0.55 0.55 1 0 1.0 Tamb = -40C to +85C MIN MAX -1.2 V V V V V V A UNIT
IHOLD
ICC
200
500
500
A
NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.0V, with a transition time of up to 100msec. From VCC = 21.V to VCC = 5V 10% a transition time of up to 100sec is permitted. 5. This is the bus hold overdrive current required to force the input to the opposite logic state.
1998 Feb 27
7
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM MIN fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum clock frequency Propagation delay nCPAB to nBx or nCPBA to nAx Propagation delay nAx to nBx or nBx to nAx Propagation delay nSAB to nBx or nSBA to nAx Output enable time nOE to nAx or nBx Output disable time nOE to nAx or nBx Output enable time nDIR to nAx or nBx Output disable time nDIR to nAx or nBx 1 1 2 2, 3 5, 6 5, 6 5, 6 5, 6 125 1.5 1.5 1.0 1.0 1.0 1.0 1.0 1.5 1.5 1.5 1.0 1.5 2.0 1.5 3.3 2.7 2.3 2.0 3.1 2.7 3.2 3.3 3.5 2.7 4.1 4.3 3.6 2.7 4.0 4.1 3.2 4.1 4.3 4.3 4.6 4.9 4.9 4.1 4.8 4.8 5.7 5.1 Tamb = +25oC VCC = +5.0V TYP MAX Tamb = -40 to +85oC VCC = +5.0V 0.5V MIN 125 1.5 1.5 1.0 1.0 1.0 1.0 1.0 1.5 1.5 1.5 1.0 1.5 2.0 1.5 4.9 4.7 3.9 4.6 5.0 5.0 5.5 5.7 5.4 4.5 5.4 5.6 6.7 5.9 MAX MHz ns ns ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V MIN ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup time nAx to nCPAB, nBx to nCPBA Hold time nAx to nCPAB, nBx to nCPBA Pulse width, High or Low nCPAB or nCPBA 4 4 1 2.0 1.5 1.5 1.0 4.5 3.0 TYP 1.0 0.8 0.0 -0.7 2.5 2.0 Tamb = -40 to +85oC VCC = +5.0V 0.5V MIN 2.0 1.5 1.5 1.0 4.5 3.0 ns ns ns UNIT
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/fMAX nCPBA or nCPAB 3.0V or VCC whichever is less VM 0V tw(H) tPHL nAx or nBx VM tw(L) tPLH VOH VM VOL nAx or nBx VM VM tPLH tPHL VOH nAx or nBx VOL
3.0V or VCC nSBA or nSAB VM VM nAx or nBx 0V
VM
VM
SH00030
SH00031
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Waveform 2. Propagation Delay, nSAB to nBx or nSBA to nAx, nAx to nBx or nBx to nAx
1998 Feb 27
8
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
AC WAVEFORMS (Continued)
VM = 1.5V, VIN = GND to 3.0V
nOE, nDIR VM 0V tPHL nAx or nBx tPLH VOH VM VM VOL nAx or nBx VM nDIR tPZH tPHZ VOH VY 0V VM 0V 3.0V or VCC whichever is less
3.0V or VCC nSBA or nSAB VM VM
SH00032
SH00034
Waveform 3. Propagation Delay, nSBA to nAx or nSAB to nBx
Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level
nAx or nBx
nCPBA or nCPAB
TEST CIRCUIT AND WAVEFORMS
VCC 7.0V RL 90% NEGATIVE PULSE VM 10% tTHL (tF) CL RL POSITIVE PULSE 10% tW tTLH (tR) 90% 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V)
1998 Feb 27
EEEEEEEEE EEEE E EEEEEEEEE EEEE E EEEEEEEEE EEEE E
VM VM VM VM ts(H) th(H) ts(L) th(L) VM VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
3.0V or VCC nOE, nDIR VM nDIR tPZL tPLZ 3.0V or VCC VM 0V 3.0V or VCC
0V
3.0V or VCC
0V
nAx or nBx
VM
VX VOL 0V
SH00033 SH00035
Waveform 4. Data Setup and Hold Times
Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
PULSE GENERATOR
VIN D.U.T. RT
VOUT
Test Circuit for 3-State Outputs
VM
SWITCH POSITION
TEST tPLZ tPZL All other SWITCH closed closed open
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ABT/H16 3.0V Rep. Rate 1MHz tW 500ns tR 2.5ns tF 2.5ns
SA00018
9
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
1998 Feb 27
10
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
1998 Feb 27
11
Philips Semiconductors
Product specification
16-bit bus transceiver/register (3-State)
74ABT16646 74ABTH16646
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03498
Philips Semiconductors
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